Shvets Alexander Valeryevich Candidate of Engineering Science, Associate Professor

Brief biography

1976 – Born in Arkhangelsk.

 1998 – Graduated from MIET magistracy.

 2001 – Engineer at LLC “Unique Ics”.

 2004 – Defended his Candidate’s thesis on “Research and development of structural and technological methods for improving the parameters of power planar MOS transistors”.

 Since 2004 – Leading engineer at JSC “Milandr”, performing various pedagogical activities at the Chair of Integrated Electronics and Microsystems.

Specializes in digital circuit design.


  • Integrated Devices Computer Simulation

  • Standard Cell Designing

  • Digital Device Designing